Every component on the diagram below is live. Tap a block to open its datasheet drawer — what it is, why it was chosen, what got rejected, the key specs, and the one thing to say about it in the room. Copper lines are power; the cyan pulse is the signal path lighting up when a block is selected.
Two honest options. A flagship AI module (Jetson AGX Thor class, 128 GB LPDDR5X on-module, ~130 W) ships with its memory co-designed by the vendor — you build a carrier, and you get VLA-class inference. Or an industrial SoC like TDA4VM: 8 TOPS, a 32-bit LPDDR4 bus, an on-die ASIL-D MCU island, −40…+125 °C, and a decade-plus lifecycle.
This guide documents the TDA4VM path, because it's the one that actually exercises the job — board-level DDR, a 48 V PDN, functional safety, and a real stack-up. The trade is explicit and you should say it out loud: you give up an order of magnitude of AI headroom to buy safety certification, industrial longevity, and full board-level ownership. If the policy must run resident on-robot, this decision flips to the module.
The whole electrical system, end to end: a Linux AI/perception domain on TDA4VM, a certifiable real-time/safety domain, the 48 V power tree, the debug spine — and, across the EtherCAT fieldbus, one of the N joint/axis nodes that actually move the robot. Follow the chain from a camera frame to motor torque and back through the encoder.
10 layers for LPDDR4 (32-bit @ 4266 MT/s), PCIe Gen3, and a clean 48 V→POL PDN. The narrower memory bus is why this is 10 layers and not 12 — a real consequence of the TDA4VM choice. Organizing rule is unchanged: every high-speed signal layer sits against a solid reference plane, and no signal crosses a plane split. Tap a layer.
L1 ▸ L10 · top to bottom · impedance: 40Ω SE / 80Ω diff (LPDDR4) · 85Ω (PCIe Gen3) · 90Ω (USB3) · 100Ω (Ethernet / EtherCAT)
The joint/axis node is a separate, much smaller board — typically 6 layers, and its hard problem is not density but isolation and return-path discipline: keeping the GaN stage's high dv/dt switching node away from the encoder pair and the shunt-sense Kelvin connection.
What actually runs down each pipe: the signal groups, how many conductors, the electrical rules, and — where one exists — the connector. These are the same records the diagram's bus tags open, collected here so you can read them straight through.