Analog reference · power output stages

Amplifier Classes

Classes A through H, each with a schematic, how the stage works, the efficiency and dissipation math, and the waveforms that define it. Written to be read top to bottom once, then used as a lookup.

The one idea behind the letters

Every class answers the same question: for how much of each signal cycle does the output device conduct, and is it acting as a controlled current source or as a switch? The fraction of the cycle is the conduction angle (360° means always on). Classes A, B, AB and C are linear stages that shrink the conduction angle to cut idle current. Classes D, E and F stop operating the device in its linear region and use it as a switch, so the device has either voltage across it or current through it, never both. Classes G and H keep a linear stage but lower its supply voltage when the signal is small.

Power wasted in the device is the integral of v_CE·i_C over the cycle. Every class is a different way of keeping that product small.

input drivecurrent in one output devicetank output (class C)

Conduction angle by class, two signal cycles. Shaded regions are when the device conducts. A never turns off; B conducts exactly half the cycle; AB slightly more than half; C conducts in short pulses and relies on a tuned tank to rebuild the sine.

Definitions used throughout

η = P_outP_DCdrain or collector efficiency

PAE = P_out − P_inP_DCpower-added efficiency, used at RF where drive power is not negligible

P_D = P_DC − P_out = 1T∫ v_CE(t) i_C(t) dtheat in the output devices

Sine-wave output of peak voltage V_p into R_L delivers P_out = V_p²/(2R_L). Efficiency figures below are ideal (zero saturation voltage, ideal parts) unless stated.

Always on, biased mid-range

conduction 360°η max 25% (R) · 50% (L)best linearity, worst idle loss

Common-emitter class A with a choke (RFC) feeding the collector. R₁/R₂ set the base voltage, R_E stabilizes the DC point, C_E bypasses it for signal. Replace the choke with a resistor and the ceiling drops from 50% to 25%.

How it works

The bias network holds the collector at a quiescent current I_Q that sits in the middle of the device's range. The signal swings the current above and below I_Q, so the transistor never cuts off and never saturates.
Because the device always operates as a transconductance (g_m = I_C/V_T for a BJT), there is no switching event anywhere in the cycle. Distortion comes only from g_m changing as the current moves.
With an inductive feed, the collector sits at V_CC at DC and swings between 0 and 2V_CC. The inductor stores energy on one half-cycle and returns it on the other, which is what doubles the efficiency ceiling.
The cost: the supply delivers V_CC·I_Q whether or not there is any signal. With no signal, all of it is heat in Q₁.

Efficiency, inductor-fed

Choose R_L = V_CC/I_Q so the voltage and current limits are reached together.

P_DC = V_CC I_Qconstant, independent of signal

P_out = V_p²2R_L , V_p ≤ V_CC

η = 12(V_pV_CC)² → 50% at full swing

Efficiency, resistor-fed

With a collector resistor R as the load, Q sits at V_CC/2 and I_Q = V_CC/(2R). The resistor also burns DC power.

P_DC = V_CC²2R , P_out,max = (V_CC/2)²2R = V_CC²8R → 25%

Load lines for the inductor-fed stage. The ideal choke has zero DC resistance, so the DC load line is vertical at V_CC. The AC load line through Q has slope −1/R_L and spans 0 to 2V_CC, 0 to 2I_Q.

Dissipation and linearity

P_D = V_CCI_Q − P_outmaximum at zero signal

P_D,max = V_CCI_Q = 2 P_out,max

HD₂ ≈ v̂_be4V_Tbare BJT, exponential transfer

The device must be rated, and heat-sunk, for twice the rated output power, and it runs hottest when the amplifier is idle. The HD₂ estimate shows why: 1% second harmonic needs only about 1 mV of base swing. Emitter degeneration and global feedback are what make a real class A stage linear.

Where you see it

Every small-signal stage: op-amp input pairs, LNAs, sensor preamps, driver stages ahead of a power stage.
RF linear PAs operated backed-off for modulation fidelity.
Headphone and boutique audio amplifiers where idle heat is acceptable.
An LDO pass element is a class A stage in the same sense: always conducting, dropping the difference voltage at full load current.

Complementary push-pull, each device takes half

conduction 180° per deviceη max π/4 = 78.5%crossover distortion

Complementary emitter followers with bases tied together and no bias. Q₁ sources current on the positive half-cycle, Q₂ sinks on the negative half. Voltage gain is just under 1; the stage provides current gain.

How it works

Each transistor is biased exactly at cutoff, so with no signal no current flows and nothing is dissipated.
On positive input, Q₁ turns on as an emitter follower and pushes current into R_L; Q₂ is reverse-biased. On negative input the roles swap and Q₂ pulls current out.
Each device carries a half-wave rectified current, and the load sees the sum. Supply current now scales with the signal, which is where the efficiency gain comes from.
Matched halves cancel even-order harmonics, the same way a differential pair does.
The problem is the hand-off. A BJT needs about 0.6 V of V_BE before it conducts, so for inputs between −0.6 V and +0.6 V neither device is on and the output sits at zero. That dead band is crossover distortion.

input, 1.5 V peakclass B output

Crossover distortion. In the shaded band (±V_BE(on)) both devices are off. The error is a fixed few hundred millivolts, so it is a small fraction of a large signal and a large fraction of a small one: THD rises as level falls, the opposite of most distortion mechanisms. Feedback reduces it by the loop gain but cannot remove it, because the open-loop gain is zero inside the dead band.

Efficiency derivation

Each rail supplies a half-wave rectified current whose average is I_p/π, with I_p = V_p/R_L.

P_DC = 2·V_CC·I_pπ = 2V_CCV_pπR_L

P_out = V_p²2R_L

η = π4·V_pV_CC → 78.5% at V_p = V_CC

Efficiency is linear in output amplitude, not flat. At half amplitude (a quarter of full power) it is 39%. Real stages lose another few points to V_CE(sat) and emitter resistors.

Worst-case dissipation

P_D(V_p) = 2V_CCV_pπR_L − V_p²2R_L

dP_DdV_p = 0 ⇒ V_p = 2πV_CC ≈ 0.64 V_CC

P_D,max = 2V_CC²π²R_L ≈ 0.4 P_out,maxboth devices

So each device is sized for about 0.2 × the rated output power, versus 2× for class A: a tenfold reduction in heat-sink requirement. Note the worst case is not full power; it is around 40% of full power, where efficiency is exactly 50%.

PoutPD, both devicesPDC

Class B power vs output amplitude, normalized to V_CC²/R_L. Dissipation peaks at V_p = 0.64 V_CC at 0.203 V_CC²/R_L, then falls as the stage approaches full swing.

Push-pull with a small standing current

conduction 180°–360°η → 78.5% ideal, ≈ 70% realbias must track temperature

The classic discrete AB stage. Q₄ is the voltage-amplifier stage (VAS), loaded by a current source. Q₃ with R₁/R₂ is a V_BE multiplier that holds a fixed voltage between the two output bases. R_E (typically 0.1–0.47 Ω) adds local feedback to each output device.

How it works

The V_BE multiplier places just over 2 V_BE between the bases of Q₁ and Q₂. Both outputs are therefore already slightly on with no signal, carrying a quiescent current I_Q, typically tens of mA.
Near zero crossing both devices conduct and the stage behaves as class A, so there is no dead band. For larger signals one device turns off and the stage becomes class B.
The class A region extends to an output current of 2I_Q: at that point one device has gone from I_Q to 2I_Q and the other from I_Q to zero.
Q₃ is mounted on the output heat sink. As the outputs heat up and their V_BE falls, Q₃'s V_BE falls with them, lowering the bias voltage and holding I_Q roughly constant.
Feedback around the whole amplifier then reduces the remaining gain wobble at the class A to B transition.

Bias equations

V_bias = V_BE3(1 + R₁R₂)V_BE multiplier

V_bias = V_BE1 + |V_BE2| + 2I_QR_E

dV_biasdT ≈ −2 mV/°C · (1 + R₁R₂)

I_QR_E ≈ V_T ≈ 26 mVOliver's condition, BJT outputs

Thermal runaway

At a fixed V_BE, collector current rises by about 2 mV / 26 mV ≈ 8% per °C. More current means more heat, which lowers V_BE further. Without tracking and R_E, a BJT output stage can run away and fail.

R_E: any rise in I_Q raises the drop across R_E, which takes V_BE away from the device. This is local negative feedback.
Q₃ on the heat sink: compensates the global temperature change, with a thermal time lag of seconds.
MOSFET outputs: above the zero-temperature-coefficient point, R_DS(on) rises with temperature, which helps, but at typical AB bias currents they sit below that point and still need tracking.

Where you see itNearly every linear audio power amplifier, and the output stage of almost every op-amp, line driver and audio codec headphone driver. In an op-amp the V_BE multiplier is usually replaced by two diode-connected transistors or a translinear loop.

Short current pulses into a tuned tank

conduction < 180°η 78.5% → 100% as angle → 0constant-envelope RF only

The base is held below cutoff by −V_BB (or by self-bias, where base current rectified through R_B develops the negative voltage). Only the tips of the input sine turn Q₁ on. The parallel LC tank, resonant at f₀ = 1/(2π√LC), turns the current pulses into a clean sine.

How it works

The transistor conducts only near the peak of each input cycle, for a total angle 2θ less than 180°. It delivers a narrow current pulse once per cycle.
A pulse train is rich in harmonics, but the tank presents a high impedance (≈ R_L) only at f₀ and a near-short at every harmonic. Only the fundamental component of the pulse develops a voltage, so the output is a sine at f₀.
The tank's stored energy carries the output through the part of the cycle when the transistor is off, like a flywheel. Loaded Q of 5 to 20 is typical.
The device conducts only when the collector voltage is near its minimum (the tank is at its negative peak), so the v·i product during conduction is small. That is the source of the efficiency.
Output amplitude does not track input amplitude, so class C cannot carry amplitude modulation. It suits FM, CW, FSK, and oscillators. Tune the tank to 2f₀ or 3f₀ and the same stage becomes a frequency multiplier.

Fourier analysis of the pulse

Model the collector current as a truncated cosine of peak I_M and half-angle θ:

i_C = I_Mcos ωt − cos θ1 − cos θ , |ωt| < θ

I₀ = I_Msin θ − θ cos θπ(1 − cos θ)DC component

I₁ = I_Mθ − sin θ cos θπ(1 − cos θ)fundamental

η = V₁I₁/2V_CCI₀ = 2θ − sin 2θ4(sin θ − θ cos θ)with V₁ = V_CC

Check: θ = π gives 50% (class A); θ = π/2 gives π/4 (class B). The same formula covers A, AB, B and C; they are points on one curve.

efficiency ηfundamental current I₁, relative to class B at the same I_M

As the conduction angle shrinks, efficiency rises toward 100% but the fundamental current, and so the output power for a given peak device current, falls toward zero.

Conduction 2θ	Class	Ideal η	I₁ / I_M	Output vs class B, same peak current
360°	A	50.0%	0.500	1.00×
180°	B	78.5%	0.500	1.00×
150°	C	84.4%	0.455	0.91×
120°	C	89.7%	0.391	0.78×
90°	C	94.0%	0.310	0.62×
60°	C	97.2%	0.215	0.43×

The practical sweet spot is 120°–150°: most of the efficiency gain without demanding very high peak current from the device. Narrower angles also need more drive, which hurts PAE.

Switching half-bridge, PWM in, LC filter out

device fully on or offη 90–97% typicalEMI, dead time, filter

A comparator turns the audio signal into PWM by comparing it with a triangle carrier at f_sw (300 kHz–1 MHz for audio). The gate driver inserts dead time and drives a high-side and a low-side MOSFET. The switch node (SW) toggles between the rails; the second-order L_fC_f filter recovers the average.

How it works

The transistors never sit in their linear region. When on, they have current but only I·R_DS(on) across them. When off, they have voltage but no current. Ideally, dissipation is zero.
The information is in the duty cycle. Where the signal is above the triangle, the high side is on; where below, the low side is on. Averaged over one carrier period, the switch node equals the signal.
The LC filter's corner sits well above the signal band and well below f_sw, so it passes the signal and removes the carrier. Residual carrier ripple appears as a small triangle current in L_f.
Linearity comes from the modulator, timing accuracy and supply rejection, not from device curves. An open-loop class D has essentially zero PSRR, because the output is a scaled copy of the rail. Most designs therefore close a feedback loop around the switch node or post-filter.
A motor inverter phase leg is the same circuit: a half-bridge, PWM, and the motor winding as the inductor.

Natural-sampling PWM, one signal period shown with a carrier 14× the signal frequency for visibility. Top: carrier and reference (modulation index 0.8). Middle: switch-node voltage. Bottom: filtered output, the reference plus a small carrier ripple.

Modulation and filter

D(t) = 12(1 + m sin ωt)duty cycle, m = modulation index

v̄_SW = (2D − 1)V_DD = m V_DD sin ωt

f₀ = 12π√(L_fC_f) , Q = R_L√(C_f/L_f)Q ≈ 0.707 for Butterworth

Δi_L = 2V_DDD(1 − D)L_f f_sw ≤ V_DD2L_f f_swworst at idle, D = 0.5

Ripple current is largest with no signal, so it sets the idle loss in L_f and the switches. The filter Q depends on R_L; a speaker is not a resistor, so the response peaks when the load impedance rises.

Where the losses go

P_cond = I_rms²R_DS(on)

P_sw ≈ 12V_busI(t_r + t_f)f_sw

P_gate = Q_gV_GSf_sw per device

P_rr + P_oss = (Q_rrV_bus + ½C_ossV_bus²)f_sw

Switching, gate and inductor-ripple losses do not scale with output, so efficiency falls at low power even though it stays above 90% at rated output.

Worked example: 100 W into 4 Ω, ±35 V bus, 400 kHz	Value
Peak / rms output current: √(2·100/4)	7.07 A / 5.0 A
Conduction: 5.0² × 20 mΩ (one device always on)	0.50 W
Switching: ½ × 70 V × 4.5 A (avg \|i\|) × 20 ns × 400 kHz	1.26 W
Gate: 2 × 10 nC × 10 V × 400 kHz	0.08 W
Inductor DCR and core (assumed)	≈ 1.5 W
Efficiency at full power	≈ 96%

Dead time

Both switches must never be on together, or the bus is shorted through them (shoot-through). The driver waits a dead time t_d between turning one off and the other on. During t_d, the inductor current forces the switch node to a rail through a body diode, and which rail depends on current direction.

v_err ≈ sgn(i_L)·V_bus·t_d·f_sw

20 ns × 400 kHz = 0.8% of V_bus ≈ 0.56 Vfor the example above

The error is a square wave in phase with the current: odd harmonics that are worst at low level, much like crossover distortion. GaN shortens the needed dead time and has no reverse-recovery charge, which is why it lowers both distortion and loss.

Design issues in practice

EMI: the switch node has fast edges at tens of V/ns. Keep the hot loop (bus cap, HS, LS) tight, and consider spread-spectrum carriers and slew control.
Bus pumping: a half-bridge returns energy into the supply on part of each cycle at low frequency. A full bridge (BTL) avoids it and doubles the voltage swing.
Filterless designs for small speakers use three-level (BD) modulation, so the idle differential output is zero and the speaker inductance acts as the filter.
Feedback: post-filter feedback corrects filter and load errors but must handle the filter's 180° phase shift.

Single switch with a load network that shapes the turn-on

switch, D ≈ 50%η 100% ideal, 85–95% realV_peak ≈ 3.56 V_DD

The switch S drives a shunt capacitor C₁ (which absorbs the transistor's own C_oss) and a series L₀C₀ resonator tuned to f₀, plus a small excess inductive reactance jX. The RF choke delivers constant DC current.

How it works

Class D at RF fails on capacitance: every cycle the switch discharges ½C_ossV² into its own channel. At 100 MHz and beyond, that loss dominates.
Class E makes the capacitance part of the tuned network. While the switch is off, the choke current and the resonant load current charge and discharge C₁. The network is detuned (the jX term) so the drain voltage rings up and comes back to exactly zero, with zero slope, at the instant the switch turns on.
Zero-voltage switching (ZVS): v = 0 at turn-on, so no capacitor energy is dumped. Zero-derivative switching (ZDS): dv/dt = 0 at turn-on, so the timing is tolerant of small errors and the switch current starts from zero.
Voltage and current never overlap, so the ideal efficiency is 100% even with slow switches.
The price is device stress: the drain sees about 3.56 V_DD peak, and the circuit is tuned for one load. A load change moves the turn-on away from ZVS.

v_DS / V_DDi_S / I_DC

Ideal class E waveforms, D = 50%. Current flows only while the voltage is zero; the voltage returns to zero with zero slope just before turn-on.

Ideal waveforms (Sokal / Raab)

on, 0 ≤ θ < π: i_S = I_DC[1 − √(π²+4)2 sin(θ + φ)]

off, π ≤ θ < 2π: v_DS = πV_DD[θ − 3π2 − π2cos θ − sin θ]

φ = π − arctan(2/π)so that i_S(0) = 0

Design equations, high loaded Q

R = 8π²+4V_DD²P_out = 0.5768 V_DD²P_out

C₁ = 0.1836ωR , X = 1.1525 R

V_DS,pk = 3.562 V_DD , I_S,pk = 2.862 I_DC

f_max ≈ 0.18362πR C_ossC₁ cannot be smaller than C_oss

Where you see itRF PAs for constant-envelope signals, 6.78 MHz and 13.56 MHz wireless power transmitters, induction heating, and resonant DC-DC converters. Wide-bandgap devices (GaN, SiC) with low C_oss push f_max high.

Harmonic tuning: square voltage, half-sine current

harmonic-terminated loadη 100% ideal, ≈ 91% with 3rd onlynetwork loss at microwave

A lumped class F with third-harmonic peaking. L₃∥C₃ resonates at 3f₀ and presents an open circuit there; L₀∥C₀ resonates at f₀, passing the fundamental to R_L and shorting the other harmonics. At microwave, a quarter-wave line does the job of the whole network.

How it works

Bias the device like class B, so it conducts half the cycle. Then control what impedance the drain sees at each harmonic, not just at f₀.
Even harmonics shorted: the drain voltage has no even harmonics, so the current is free to contain them. The current takes its natural class B half-sine shape.
Odd harmonics open: the current has no odd harmonics above the fundamental, so the voltage is free to contain them. Adding odd harmonics in the right phase flattens the voltage into a square wave.
Result: voltage is zero while current flows and current is zero while voltage is high. The device behaves as a switch without being driven as one.
With a finite number of harmonics controlled, the square is only approximated. Tuning the 3rd alone raises the fundamental voltage by 2/√3, giving about 91% ideal.
Inverse class F (F⁻¹) swaps the terminations: square current, half-sine voltage. It is common with GaN HEMTs.

v_DS / V_DDi_D / I_DC

Ideal class F waveforms with all harmonics terminated: square voltage from 0 to 2V_DD, half-sine current with peak π·I_DC. They never overlap.

V₁ = 4πV_DDfundamental of a 0 to 2V_DD square wave

I₁ = π2I_DCfundamental of a half-sine with average I_DC

P_out = ½V₁I₁ = V_DDI_DC ⇒ η = 100% , R₁ = V₁I₁ = 8π²V_DDI_DC

η_{3rd only} = π4·2√3 ≈ 90.7%half-sine current, maximally flat voltage with 3rd harmonic

G/H

Linear output stage, supply that follows the signal

AB stage + rail controllarge gain at back-offrail switching transients

Class G, positive half. Q₁'s collector normally draws from the low rail through D₁. When the signal approaches V_L, S₁ turns on (with a hold time, so it does not chatter on every peak), the collector node jumps to V_H, and D₁ reverse-biases. Class H replaces the switch with a fast tracking supply (often a buck) that holds the rail a fixed headroom above the signal.

How it works

In class AB, the output device drops the difference between the rail and the output. For music or modulated RF, the signal spends most of its time far below peak, so most of the time that difference is large and wasted.
Class G provides two or more fixed rails and switches between them on the instantaneous signal level. Most of the time the stage runs from the low rail; peaks briefly pull from the high rail.
Class H varies the rail continuously. The rail follows the signal envelope with a small headroom, so the drop across the output device stays small throughout.
The linear AB stage still sets the fidelity; the supply only removes headroom. In RF this is envelope tracking: a fast DC-DC modulator feeds the PA drain.
Hazards: glitches when the rail switches, the switch's own losses, and in class H the tracking bandwidth. If the rail cannot follow a fast transient, the output clips.

|vout|class AB fixed railclass G railclass H rail

Rail behavior on a burst signal, positive rail only, normalized to the full-scale rail. The gap between the rail in use and |v_out| is the voltage dropped across the output device, and device dissipation is that gap times load current.

Efficiency at back-off

η_AB = π4V_pV_H

η_G = π4V_pV_L for V_p ≤ V_L

η_H ≈ π4V_pV_p + V_hr · η_supply

Example

V_L = V_H/2, signal peak at 0.4 V_H:

Class AB: π/4 × 0.4 = 31%
Class G: π/4 × 0.8 = 63%
Class H with 5% headroom and a 90% tracking supply: π/4 × 0.4/0.45 × 0.9 ≈ 63%, and it stays high at every level.

Side by side

Class	Conduction	Device acts as	Ideal η	Linearity	Typical use	Main headache
A	360°	current source	25% / 50%	best	small-signal, drivers, LDO pass	heat at idle, P_D = 2P_out,max
B	180°	current source, half each	78.5%	crossover	rarely used bare	dead band at zero crossing
AB	180–360°	current source	≈ 78.5% at full	good with feedback	audio power, op-amp outputs	bias tracking, thermal runaway
C	< 180°	pulsed current source + tank	78.5–100%	none (amplitude lost)	FM, CW, oscillators, multipliers	output falls as angle shrinks
D	switch	switch	100% (90–97%)	from modulator + feedback	audio, motor drives, inverters	EMI, dead time, filter, PSRR
E	switch	switch + shaped network	100%	none (constant envelope)	RF PAs, wireless power	3.56 V_DD stress, load sensitivity
F	≈ 180°	switch-like via harmonics	100% (≈ 91% with 3rd)	constant envelope	RF and microwave PAs	harmonic network loss
G	AB stage	current source, stepped rail	better at back-off	AB-like	pro audio, line drivers	rail-switch glitches
H	AB stage	current source, tracking rail	best at back-off	AB-like	pro audio, cellular ET	tracking supply bandwidth

class A (inductor-fed)class B / ABclass G, VL = ½VHclass D (illustrative losses)

Efficiency vs output amplitude for a sine, normalized to full scale. A falls with the square of amplitude, B linearly. Class G holds B's full-scale efficiency down to half amplitude. The class D curve assumes fixed losses of 1% of full-scale power plus 4% proportional loss, which is why it drops at low output.

Questions to be ready for

Derive the class B efficiency limit in one line.

Each rail supplies a half-sine with average I_p/π, so P_DC = 2V_CCI_p/π. Output is V_pI_p/2. The ratio is (π/4)(V_p/V_CC), which is 78.5% at full swing.

At what output level does a class B stage dissipate the most?

At V_p = 2V_CC/π ≈ 0.64 V_CC, about 40% of full power. Total dissipation there is 2V_CC²/(π²R_L) ≈ 0.4 P_out,max, or 0.2 P_out,max per device, and efficiency is exactly 50%.

Why is class A only 25% with a resistive load, and how do you get to 50%?

The collector resistor burns DC power and limits the swing to ±V_CC/2. An inductor or transformer feed carries DC with no drop, lets the collector swing to 2V_CC, and returns stored energy each half-cycle, which doubles the ceiling.

Why does crossover distortion get worse at low volume?

The dead band is a fixed ±V_BE regardless of signal size, so it is a larger fraction of a small signal. Feedback cannot fix it inside the dead band because the open-loop gain there is zero. AB bias removes the dead band.

How does a V_BE multiplier track temperature, and why put it on the heat sink?

It produces V_BE(1 + R₁/R₂), so its tempco is about −2 mV/°C times the same multiplier, which matches the falling V_BE of the output devices. It only tracks if it shares their temperature, hence the heat sink mounting.

Why does a class D amplifier lose efficiency at low output?

Gate charge, switching transitions at the ripple current, C_oss energy and inductor ripple loss are present even at idle. They are fixed costs, so they dominate when output power is small.

What is the dead-time trade-off in a half-bridge?

Too short risks shoot-through across process, temperature and driver delay variation. Too long adds body-diode conduction loss, reverse-recovery loss in silicon, and a distortion term of about V_bus·t_d·f_sw in sign with the current. GaN lets you run 5–20 ns with no Q_rr.

Why use class E rather than class D at RF?

Class D loses ½C_ossV² every cycle, which scales with frequency. Class E absorbs C_oss into the load network and turns on at zero voltage with zero slope, so that energy is recycled instead of dissipated.

Can class C or E amplify an AM or OFDM signal?

Not directly; their output amplitude is set by the supply, not the input. You can recover amplitude by modulating the supply (polar transmitters, envelope tracking) or by outphasing two constant-envelope amplifiers.

How does this connect to motor drives?

A three-phase inverter is three class D half-bridges with the motor windings as filter inductors. The same issues apply: dead time and its distortion (torque ripple at low speed), switching loss vs PWM frequency, dv/dt coupling into sensors, and current sensing in the presence of switching noise.